- Die area
- 70.6 mm²
- Transistors
- 8.315 billion
- Process
- TSMC N4P
Processor die photography by
Fritzchens Fritz, via
Flickr, dedicated to the public domain under
CC0 1.0.
The precise architecture and internal floorplan of any commercial processor
are proprietary. The die annotations and block layouts shown here are
generalized, approximate illustrations intended solely for educational
purposes, and do not represent any manufacturer’s exact design.
© 2026 Elliot Staresinic. All rights reserved. Silicon From Scratch™ is a
trademark of Elliot Staresinic.
Silicon From Scratch